Up to now, video coding methods have been evaluated regarding compression efficiency. The objectives of the first video standards were indeed the storage of films on a CD (MPEG-1), the broadcast of television programs on cable/satellite (MPEG-2) and the streaming/downloading of video contents over the Internet (MPEG-4). The constraints were bandwidth and storage capacity limitations. The second evaluation criterion was the computational complexity, especially in applications where real-time coding was necessary. Today, compression efficiency is still wanted, while computational complexity becomes less and less problematic thanks to the increasing speed of processors. In new applications, however, a third criterion is getting more and more important. It is power consumption. Mobile devices, such as personal digital assistants or mobile phones, are expected to offer video coding capabilities in a near future. But with existing techniques autonomy is dramatically short. Battery life extension and advances in hardware implementation might increase it, but certainly not enough.
In the known state of the art, the power consumption is either controlled from an architectural point of view or from an algorithm point of view.
In the architectural approach, some work is done to map and optimize a video architecture to a predetermined video algorithm. For example, the paper entitled “An 80/20 MHz 160 mW multimedia processor integrated with embedded DRAM, MPEG-4 accelerator and 3-D rendering engine for mobile applications”, by C. W. Yoon and al., IEEE Journal of Solid-State Circuits, Volume: 36, Issue: 11, pp. 1758-1767, November 2001, describes a low power consumption video device. Said device comprises embedded memories that are located close to the central processing unit CPU and co-processors, such that an access to their data goes through less cable and dissipates less energy. According to this conventional approach, however, power matters are considered too late and result in a non-optimal solution.
The paper entitled “Motion Estimation for Low Power Video Devices”, by C. De Vleeschouwer, T. Nilsson, in International Conference on Image Processing, 2001., Vol. 2, 2001, pp. 953-956, describes a low power method. In this document, the low power consumption is achieved by reducing memory accesses and transfers. For that purpose, the motion estimation has been simplified but at the cost of compression performance.